1. Technical Field
This invention is generally directed to a cache management system for use in a computer, embedded controller, or the like.
2. Related Art
Computers, embedded controllers, and other processor based systems typically employ multiple memory storages arranged at different levels of the memory hierarchy. Higher levels of the hierarchy are further removed from the processor than lower levels. As the distance from the processor increases, the memory capacity and the access time both increase. For example, general memory data storage may be used at a high level of the memory storage hierarchy to store and maintain the significant volumes of data used in the overall system. The general memory data storage may take on a variety of different forms including, but not limited to, hard disk drives, floppy disk drives, optical drives, flash storage, or the like. These types of general memory storages are often chosen for this high level of the memory hierarchy because of their significant storage capacities.
Although these general memory storages may store and maintain large volumes of data, direct access of the data by the processor may prove to be inefficient because of the large access times associated with the devices. Accordingly, processing systems may employ a cache at an intermediate level of the memory hierarchy. A cache allows data to be read and written at a higher speed than would otherwise occur in a direct access arrangement. The cache may reside in an intermediate storage, such as in a random access memory (RAM), that exhibits faster access times than the general memory storage.
The cache may be used to store selected data from various files that are in an open state. Files are placed in an open state when software applications executed by the processor place requests to access the file data. When reading data, a cache lookup is performed to search the cache memory. The search is executed to determine whether the requested file data is included in the data that has been selected for storage in the cache. A cache hit occurs when the requested file data is available from the cache. In such instances, the requested data is accessed directly in the cache memory as opposed to the general memory storage. A net savings in the time required to access the data is realized with a cache hit.
A cache miss occurs when the requested data is not located in cache memory. When a cache miss occurs, the requested data is accessed from the general memory storage. Additionally, memory in the cache may be filled using data selected from the corresponding file on the general memory storage. The selected data may be chosen to increase the probability that future access requests result in cache hits. When the cache memory is full, one or more of the cache entries may be replaced with other file data that is calculated to increase the likelihood of cache hits.
When writing blocks to the data storage, the file system may pool up a number of blocks to be written. This minimizes the frequency with which blocks are written to the general memory storage. The cache may be flushed—i.e. completely written out to the device—on a periodic basis, when cache space is exhausted, a specific threshold is reached, or a request is made to synchronize the state of files of the file system.
In conventional systems, logical-to-physical address mappings must be applied prior to caching operations so that the cache is completely organized on the basis of the physical addresses of the file data. This organizational structure leads to problems when write operations are triggered. Either data is inefficiently written to the storage unit, or CPU processing time or separate “scatter-gather” DMA controllers are required to organize the data to be written to the memory storage units in physically local sections. Similarly, requests for data from the same often must be serviced from geographically dispersed regions of the cache. Accordingly, an alternative to the traditional cache management and structure is needed.